1. Field of the Invention
The present invention relates generally to microprocessor design, and more particularly, to establishing a die connection bump layout for defining an interface between a die and a package.
2. Description of the Related Art
Packaging is a common practice in microprocessor design and fabrication in which a die (i.e., a microchip) is attached to a package. In general, the package provides the die with a substantial lead system, physical protection, environmental protection, and heat dissipation. The primary function of the package is to provide the substantial lead system that allows connection of the die to a circuit board or an electronic device. This connection cannot be made directly due to the fragility of metal conduction systems used to interconnect components within the die. Thus, die conductors generally terminate in larger bonding pads around a periphery of the die. The die bonding pads are electrically and mechanically connected to corresponding inner leads on the package. The package provides a metal conduction system from the inner leads to corresponding outer leads which are mechanically stronger that the die conductors. In this manner, the package provides a more substantial lead system for connecting the die to the circuit board or other electronic device.
Connections between the die bonding pads and the corresponding package inner leads can be established by a number of known methods including a flip-chip and bump method. In the flip-chip and bump method, a metal bump is deposited on each die bonding pad. When the die is flipped over and placed on the package, each metal bump connects to a corresponding package inner lead. The mechanical and electrical connections between the die and the package are then established through a soldering process in which the metal bumps fuse with the inner leads of the package at an elevated temperature. The flip-chip and bump method is also referred to as controlled collapse chip connection or C4. Accordingly, the metal bumps can be referred to as die connection bumps or C4 bumps.
Accurate package modeling is necessary in microprocessor design to allow the input/output (IO) drivers and receivers to be properly designed, particularly where high frequency IO is utilized. An interface between the die and package should be established to allow accurate package modeling. Establishment of the interface also allows a die size to be firmly established for use in evaluating other issues such as die yield. Establishing the interface between the die and package involves an iterative process in which a large number of mechanical and electrical design variables and constraints are balanced.
Establishing the interface between the die and package generally constitutes determining the number and placement of die bonding pads (i.e., die connection bumps) around the periphery of the die. The number of die connection bumps is based on a required number of signal bumps and a required number of power bumps. The required number of power bumps is typically a function of a required signal-to-power ratio. Once the number and types of die connection bumps are determined, their placement is governed by both the die and package design requirements.
Customarily, die designers and package designers collaborate through an iterative process to establish the proper placement of die connection bumps. The die designers generally use a die connection bump layout tool to evaluate the die connection bump layout with respect to each mechanical and electrical consideration affecting the die design. The package designers generally use a package routing tool to evaluate the ability of the package inner lead locations (corresponding to die connection bump locations) to be properly routed to their corresponding package outer leads. The time required for iteration between the die designer and package designer to establish the proper placement of die connection bumps, coupled with the changing nature of design variables and constraints, can become a critical issue relative to an overall design process.
In view of the foregoing, there is a need for a method and apparatus by which the die designer can efficiently evaluate package routings associated with a given die connection bump layout without recourse to the package designer.